This section provides background information related to the present disclosure which is not necessarily prior art.
FIG. 1 is a simplified schematic of a typical prior art UPS system 100. The basic elements of UPS system 100 are rectifier 102, inverter 104, a DC power source such as battery 106, a controller 108, and a static transfer switch 110. Battery 106 may be coupled through a boost circuit 107 to an input 105 of inverter 104, which is also coupled to an output 103 of rectifier 102. An input 114 of rectifier 102 is coupled through disconnect switch 116 to a primary power source 115 of power, typically an AC feed from a utility. An input 118 of static transfer switch 110 is coupled through disconnect switch 120 to a secondary power source 122 of power, typically an AC feed from a utility, and an output 124 of static transfer switch 110 is coupled to an output 126 of inverter 104. Output 126 of inverter 104 is coupled through a disconnect switch 128 to output 112 of UPS system 100. Output 112 of UPS system 100 is coupled through a manual bypass switch 130 to secondary power source 122. It should be understood that primary power source 115 and secondary power source 122 can be different power sources or the same power source, such as the same utility feed coupled to both disconnect switches 116, 120. Static transfer switch 110 is used to switch load 134 connected to an output 112 of UPS system 100 to secondary power source 122. In this regard, when static transfer switch 110 is closed, the load is connected to secondary power source 122 and when static transfer switch is open, the load is disconnected from secondary power source 122 (unless manual bypass switch 130 has been closed).
Controller 108 controls UPS system 100 including controlling inverter 104 by varying the duty cycle of the switching devices in inverter 104 so that inverter 104 provides a desired output voltage. Controller 108 also controls static transfer switch 110 to cause it to switch between closed and open. Controller 108 can be, be part of, or include: an Application Specific Circuit (ASIC); an electronic circuit; a combinational logic circuit; a field programmable gate array (FPGA); and/or a processor such as a Digital Signal Processor (DSP), microcontroller, or the like. It should be understood that controller 108 may include one or more than one of the foregoing, such as digital controller based on DSPs that control each of the functional blocks of UPS system 100 by generating the proper switching signals to switch the power semiconductors such as IGBTs and thyristors.
Rectifier 102 may be a three phase rectifier having three full rectification legs (and may use power switching devices such as IGBTs), one for each phase, and inverter 104 may be a three phase inverter having three inverter legs, one for each phase. Rectifier 102 and inverter 104 are configured in a double conversion path with UPS system 100 thus being a double conversion UPS.
Static transfer switch 110 is typically implemented with power semiconductor switching devices. One type of power semiconductor switching device used in implementing static transfer switches is the thyristor since it is a very robust device, is relatively inexpensive, and has low losses. Typically, a static transfer switch implemented with thyristors has a pair of reverse connected thyristors 132 for each phase. That is, if UPS system 100 is a three phase system, static transfer switch 110 would have three pairs of reverse connected thyristors 132, one for each phase. It should be understood that each thyristor 132 may include a plurality of parallel connected thyristors 132 to provide the requisite power handling capability.
One drawback of static transfer switches implemented with thyristors is that thyristors only turn off when the current passing through them is zero. Consequently, when the static transfer switch is used to switch the load between two sources, it is necessary to take into account the possibility of paralleling the two power sources for up to half the period of the power sources (for example, 10 msec in the case of 50 Hz power sources and 8.32 msec in the case of 60 Hz power sources).
Paralleling the two power sources has two potential drawbacks: (a) an uncontrolled current passes between the two power sources via the static switches, and (b) when the two power sources are in parallel, the output waveform depends on the output voltage, the two power sources and their output impedance.
In the STS (static transfer switch) applications in which thyristors are used, dedicated solutions are implemented to avoid paralleling the power sources, an important objective. This results in a transfer delay of up to half the period of the power sources.
In UPS applications, the inverter has a current limited capacity. Therefore, an important objective is to reduce the length of time the two power sources are in parallel to a minimum in order to supply the load with the best quality voltage waveform.
In both these applications (STS and UPS), transfer between the two power sources is usually due to power quality disturbances on the power source supplying the load. Undervoltages (interruptions/sags) are the most probable root causes of these disturbances.
All the time that the current through the thyristor is in phase with the power source voltage, transferring the load to the second power source (synchronized with the first one) when an undervoltage is detected forces the current to go to zero, thus reducing the time the two power sources are in parallel to less than 1 ms and eliminating any overcurrent between the two.
A problem arises when, at the instant of the transfer, the load current is not in phase with the power source voltage (inductive or capacitive power factor). In this case, the two power sources may be in parallel at an uncontrolled current and the disturbance may persist at the output of the UPS for up to half the period of the power sources.
When the second power source is an inverter, as is the case with a UPS, a possible solution would be to modify the inverter voltage waveform in such a way as to reduce the current quickly to zero. However, this means having an inverter with a very high current capacity and causes strong voltage oscillation on the load.
The IEC has defined three UPS topologies in its standard #62040-3. These are defined by the relationships and dependencies (or lack thereof) between input and output voltage and frequency characteristics. The three topologies are:                a). VFI—Voltage and Frequency of the Output are Independent of Input Voltage and Frequency—this is only possible if they are generated independently, as in a double conversion mode or topology.        b). VFD—Voltage and Frequency of the Output are Dependent on the Input. This is true if there is no voltage regulation or independent generation of the output, which identifies a standby or offline mode. There can be some passive filtering, but no active power correction.        c). VI—Voltage of the Output is Independent of Input (Frequency In=Out). This is descriptive of line interactive mode or topology.        
UPS system 100 can be operated in these three modes. In the VFD mode, static transfer switch 110 is closed and the load is connected to the input source voltage through static transfer switch 110. Inverter 104 is off and rectifier 102 is used only to charge battery 106. In the VI mode, UPS system 100 is operating as a line interactive UPS with static transfer switch 110 closed and the load is connected to the input source voltage through static transfer switch 110. Inverter 104 is operated as an active filter (current source) by controller 108 to compensate for reactive and harmonic load currents. In the VFI mode, UPS system 100 is operating as a double conversion UPS. In this mode, static transfer switch 110 is open and the input source voltage is converted to DC by rectifier 102 and back to AC by inverter 104.